Responsibilities：

• Build up top and IP level verification environment for wireless communication SoC systems.

• Work with algorithm and ASIC design team to make verification plan and implement digital simulation and verification.

Requirements：

• MS or Ph.D degree in EE, CS, communications, micro-electronics
• Experience in digital verification flow, Verilog language.
• Fluent in C/C++, UVM/OVM and Perl/Shell scripts.
• CET-4, English document reading ability is required.
• Should be able to write technical documents following standard writing guideline.
• Good communication skill, team player with responsibility and passion
• Following experience is preferred:
• Assertion design experience
• UVM/OVM verification platform experience